Static Random Access Memory (SRAM) is commonly used in integrated circuits, and have use in a variety of applications such as mobile computing, consumer electronics, and communications, to name a few. With the increasing performance requirements of these applications, the read speed and write speed of SRAM cells also becomes more important. Furthermore, sufficient read and write margins are required to achieve reliable read and write operations. With the increasingly reduced critical dimensions of SRAM cells, however, it is becoming challenging to achieve sufficient margin for read and write operations. It is therefore desirable to have improvements in SRAM circuits to address the aforementioned issues.